Semiconductor memories are used in integrated circuits for electronic applications, including radios, televisions, cell phones, and personal computing devices, as examples. One type of semiconductor memory device involves spin electronics, which combines semiconductor technology and magnetic materials and devices. The spins of electrons, through their magnetic moments, rather than the charge of the electrons, are used to indicate a bit.
One such spin electronic device is magnetoresistive random access memory (MRAM) array 100 as shown in FIG. 1, which includes conductive lines (word lines WL and bit lines BL) positioned in different directions, e.g., perpendicular to each other in different metal layers. The conductive lines sandwich magnetic tunnel junctions (MTJs) 102, which function as magnetic memory cells. FIG. 1 shows a perspective view of a portion of a prior art cross-point MRAM array 100. MRAM array 100 includes a semiconductor wafer comprising a substrate (not shown). The substrate has a first insulating layer (also not shown) deposited thereon, and a plurality of first conductive lines or word lines WL are formed within the first insulating layer, e.g., in a first wiring level.
In cross-point MRAM array 100, each MTJ 102 is disposed over and abuts one wordline WL. Each MTJ 102 includes three layers: ML1, TL, and ML2. First magnetic layer ML1 is disposed over and abutting wordline WL. First magnetic layer ML1 is often referred to as a hard magnetic layer, a pinning layer, or a fixed layer because its magnetic orientation is fixed. Tunnel layer, or tunnel barrier layer, TL comprising a thin dielectric layer is formed over the fixed layer ML1. Second magnetic layer ML2 is formed over tunnel barrier layer TL. The second magnetic layer ML2 is often referred to as a soft magnetic layer or a free layer because its magnetic orientation can be switched along one of two directions. First and second magnetic layers ML1 and ML2 may include one or more material layers.
Each MTJ 102 abuts second conductive line (which may be a bitline, and hence is referred to as bit line BL hereinafter) BL over and abutting second magnetic layer ML2, as also shown in FIG. 1, wherein bit line BL is positioned in a direction different from the direction of wordline WL. Array 100 comprising MTJs 102 includes a plurality of word lines WL running parallel to each other in a first direction, a plurality of bit lines BL running parallel to each other in a second direction, wherein the second direction is different from the first direction, and a plurality of MTJs 102 disposed between each word line WL and bit line BL. While bit lines BL are shown on top and the word lines WL are shown on bottom of array 100, alternatively, word lines WL may be disposed on the top of the array and bit lines BL may be disposed on the bottom of the array.
The programming of MTJs 102 involves conducting currents through MTJs 102. Accordingly, the uniformity of MTJs 102 is a factor that may affect the performance of array 100.